Often, problems in I2C bus systems have a simple cause and can easily be verified by checking with simple equipment.
- Is there a stable supply voltage Vcc? Often, external I2C devices (like I2C masters or monitors) must be provided with Vcc.
- Are appropriate termination resistances attached between SDA, SCL and Vcc? The voltage level on SDA and SCL must be Vcc as long as the bus is idle and drop near GND if shorted to GND. [Note: Very few I2C masters exist which drive SCL high and low, i.e. the SCL line is not open-drain. In this case, a termination resistor is not needed and SCL cannot be pulled low. These masters will not work together with other masters (as they have no multi-master support) and may not be used with devices which stretch SCL during transfers.]
- Are SDA and SCL mixed up? This may accidentally happen e.g. when connecting I2C buses with cables or connectors.
- Do all I2C devices support the I2C supply voltage used on the bus?
- Do all I2C devices support the maximum SCL clock rate used on the bus?
- If more than one I2C master is connected to the bus: do all masters provide multi-master support?
Further diagnostics is possible with Vcc, SCL and SDA connected to an oscilloscope and/or an appropriate I2C monitor device:
- Are the high and low-level voltages on SDA and SCL correct during I2C transfers? The I2C standard defines the low-level threshold with 0.3 Vcc, the high-level threshold with 0.7 Vcc. Modifying the termination resistance Rp, the serial resistors Rs or lowering the SCL clock rate could help here.
- Are there spikes or noise on SDA, SCL or even Vcc? They may result from interferences from other components or because the capacitances Cp and/or Cc are too high. The effects can often be reduced by using shorter interconnections.