Not every microcontroller connected to the I2C bus has an integrated I2C controller. These microcontrollers have to observe the I2C lines permanently to detect an I2C transmission. This consumes, mostly done by polling, much CPU time. To reduce this waste of CPU power, an I2C transfer can be established with a slower arbitration method.
For this, the master transmits the start-condition, followed by the start byte (‘00000001’), a dummy acknowledge pulse and a repeated start condition. The observing microcontroller has to detect only one of the seven zeros on SDA to detect an I2C transmission. This can be done with a relatively slow polling rate. As soon as the controller detects that SDA is low, it can switch to a higher polling rate in order to await the repeated start condition and the following I2C transfer.
After the transfer has ended, it can switch back to the CPU-power saving slow polling rate in order to detect the next transmission.