In order to use the I2C bus properly and efficiently, it is important to understand what happens in the hardware on the electric level. This essay explains
- the hardware setup of an I2C bus
- the requirements for proper operation of the I2C bus
- how to find the cause of problems and how to solve them
It is assumed that the reader understands the protocol basics of I2C and is thus familiar with terms like I2C master and slave, (re-)start and stop conditions and acknowledges.
For details see the I2C specification from NXP, formerly Philips. 2014 NXP released the new version Rev. 6 — 4 April 2014.
Note: High-speed I2C has additional aspects which are not addressed here.
The pictures shown in the following sections have been made with Tracii XL 2.0.
Chapters of this I2C primer:
- Typical Setup
- How I2C Hardware Works
- Termination Versus Capacitance
- Termination Versus Serial Resistance
- Serial Resistance And Debugging
- Crosstalk Between SDA And SCL
- Clock, Stretching, Arbitration
- Requirements For Devices
- Common Problems In Systems
- Obscure Problems In Systems
- Analysing Obscure Problems